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Intel Razor Lake-AX targets 700 TOPS: what 3.88x Panther Lake means for mobile AI BOMs

Intel said Razor Lake-AX will deliver 700 TOPS at INT8/FP8, 3.88x Panther Lake's 180 TOPS, using a Xe3 iGPU up to 32 cores and bringing back on-package LPDDR5X/LPDDR6 memory.

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TL;DR — three sentences

  • Intel SVP Cho Min-sung confirmed 700 TOPS at INT8/FP8 for "Razor Lake-AX" at the Semiconductors Powering Humanoids summit in South Korea. (S1)
  • That figure is 3.88x the 180 TOPS of current "Panther Lake" mobile parts, driven by a large Xe3 iGPU plus a substantial CPU complex. (S1)
  • The iGPU will ship in 16-core and flagship 32-core Xe3 variants, with a reported GPU die area of about 162.84 mm². (S1)

Taken from key_takeaways (real field, max 3 entries). Fact and analysis are labelled separately.

Intel Razor Lake-AX targets 700 TOPS: what 3.88x Panther Lake means for mobile AI BOMs — Semiconductor News news briefEditorial cover for a Semiconductor News brief. Memory motif; headline "Intel Razor Lake-AX targets 700 TOPS: what 3.88x Panther Lake means for mobile AI BOMs". Reported key numbers: 700 TOPS; 180 TOPS; 3.88 x. 1 cited source. A one-time entrance animation stops under reduced motion.SEMICONDUCTOR NEWS · NEWS BRIEFIntel Razor Lake-AX targets 700 TOPS: what3.88x Panther Lake means for mobile AI BOMsREPORTED KEY NUMBERS700 TOPS180 TOPS3.88 x1 sourceXAIPART
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Reported by TechPowerUp on . Summarized and analyzed by XAIPART Editorial.

What happened

Intel senior vice president Cho Min-sung used the Semiconductors Powering Humanoids summit in South Korea to confirm that the next-generation "Razor Lake-AX" platform will integrate 700 TOPS of AI compute on die, measured at INT8/FP8 precision.S1 That figure represents a 3.88x jump over the current "Panther Lake" mobile parts, which Intel rates at 180 TOPS in total.S1

The compute uplift is attributed to a large integrated GPU paired with a substantial CPU complex, and the iGPU is set to ship in two Xe3-based variants: a 16-core version and a flagship with 32 Xe3 cores.S1 Earlier reports cited by the source peg the GPU die at roughly 162.84 mm², signaling a physically large package.S1 Against the Arc B390 that currently serves the Panther Lake lineup, the source describes Razor Lake-AX as nearly three times as powerful.S1

Intel also used the stage to reverse an earlier memory decision: the source reports that Intel will reintroduce on-package memory on the "AX" silicon, after previously calling Core Ultra 200V "Lunar Lake" the last design with that approach. Razor Lake-AX is said to use on-package LPDDR5X or LPDDR6.S1

Key numbers
MetricReported valueSource
Razor Lake-AX on-die AI compute (INT8/FP8)700 TOPSS1
Panther Lake total compute180 TOPSS1
Reported uplift vs. Panther Lake3.88xS1
iGPU configuration16-core; flagship 32-core Xe3S1
Reported GPU die area162.84 mm²S1
Uplift vs. Arc B390~3x (per source wording)S1
MemoryOn-package LPDDR5X or LPDDR6S1
Process node, TDP, launch date, pricingNot disclosedS1

Background timeline

  1. - At the Semiconductors Powering Humanoids summit in South Korea, Intel SVP Cho Min-sung confirmed 700 TOPS for "Razor Lake-AX." [S1]
  2. - Source restates that Intel previously called Core Ultra 200V "Lunar Lake" the last on-package-memory design, then reverses course for the AX chip. [S1]
  3. - Source cites prior reporting that the iGPU comes in 16-core and 32-core Xe3 variants. [S1]

XAIPART take

Technical impact

XAIPART analysis: Routing 700 TOPS through an integrated Xe3 GPU (up to 32 cores) and a "substantial CPU complex" shifts the on-die NPU/accelerator balance; designers targeting edge AI inference should expect GPU-side INT8/FP8 paths to dominate, with the NPU role de-emphasized relative to Panther Lake.

XAIPART analysis: The return of on-package LPDDR5X or LPDDR6 - after Lunar Lake was framed as the final such design - tightens memory bandwidth and latency but removes socketed SO-DIMM flexibility, which matters for configurable industrial and embedded SKUs.

Market impact

XAIPART analysis: A 3.88x headline jump over Panther Lake and a roughly 3x lead versus Arc B390 positions Razor Lake-AX against discrete low-power AI accelerators in humanoid and edge-AI reference designs, pressuring competing mobile-SoC TOPS claims.

XAIPART analysis: The reported 162.84 mm² GPU die and on-package memory indicate a large, expensive BGA package, so procurement teams should plan for tighter allocation and longer lead times than compact Panther Lake mobile parts, especially on the 32-core flagship SKU.

Action

XAIPART analysis: For new mobile or edge-AI designs, freeze Panther Lake or Lunar Lake BOMs only if the 700 TOPS figure and on-package LPDDR5X/LPDDR6 are not on the critical path; for humanoids and coprocessor designs, hold a parallel Razor Lake-AX feasibility study until process node, TDP and launch date are disclosed.

XAIPART analysis: Buyers should pre-qualify a 16-core Xe3 variant as a hedge against 32-core flagship supply constraints, and confirm on-package memory type (LPDDR5X vs. LPDDR6) before locking firmware and validation plans.

XAIPART Forecast

XAIPART analysis: By , if Intel publishes a Razor Lake-AX 32-core Xe3 datasheet confirming at least 700 TOPS at INT8/FP8 on a sub-45W mobile envelope, XAIPART expects the platform to capture meaningful design wins in humanoid reference boards; if the published on-package memory configuration stays at LPDDR5X rather than LPDDR6, treat that signal as a delay indicator for the LPDDR6 ramp.

Facts are as reported by the cited source. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Uncertainty: figures rest on a single summit-stage announcement; process node, TDP, launch window and pricing are not disclosed; the ~162.84 mm² die area and Arc B390 comparison language are paraphrased from earlier reporting cited inside the source.

Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.

Dated developments, extracted from this page's timeline (curated milestones = hollow markers).
Timeline of dated developmentsDated entries: 2026-10-18 - At the Semiconductors Powering H…; 2026-10-18 - Source restates that Intel previ…; 2026-10-18 - Source cites prior reporting tha….2026-10-18- At the Semiconductors Powering H…2026-10-18- Source restates that Intel previ…2026-10-18- Source cites prior reporting tha…

Alternatives and lifecycle

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“Predecessor” and “alternative” labels come only from a recorded match type, a lifecycle status, or the source text. Where no match is recorded, no label is shown. Our own listings are not a market reference.

Competitive landscape

  • 21763 live listings in this category on XAIPART
  • 88 manufacturers represented
  • 57 manufacturers mentioned in our news archive over the last 30 days

Counts reflect the XAIPART catalog only — they are not market share.

Affected parts

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Where this sits in the story

Event chain · as of 2026-10-18T07:30:14+08:00 · showing 6 of 7 briefs · nodes link to published articles on this site.
Event chain — intel+semiconductor-newsChain nodes: 2026-10-08 Intel is preparing a Core 2000HX mobile family on 'Raptor Lake Next' dies, reviving DDR4 compatibility for laptops while Nova Lake-HX takes the Core Ultra 4000HX name.; 2026-10-10 ASUS has started U.S. retail of the Zenbook 14 (UX3480QA) in 8 GB and 16 GB variants, with an Intel Core Ultra 9 386H SKU slated for early Q4 2026.; 2026-10-11 Akasa launches a fully passive aluminium Mini-ITX chassis with an integrated 220 W DC-DC board and dual 2.5" bays, aimed at POS, kiosks and edge boxes running Intel LGA1851 through LGA115X CPUs up to 35 W TDP.; 2026-10-11 INNO3D launches the 6U AGS-6220V2 rack server with eight PCIe Gen 5 RTX PRO 6000 Blackwell Server Edition GPUs, aimed at AI training and inference fleets.; 2026-10-17 Bare-die photos of Nova Lake-HX and -H lay out a six-tile mobile package using TSMC N2P, Intel 3-E and Intel 18A-P nodes, with new core counts and package sizes.; 2026-10-18 Intel said Razor Lake-AX will deliver 700 TOPS at INT8/FP8, 3.88x Panther Lake's 180 TOPS, using a Xe3 iGPU up to 32 cores and bringing back on-package LPDDR5X/LPDDR6 memory.. As of 2026-10-18T07:30:14+08:00. Open forecast: Intel is preparing a Core 2000HX mobile family on 'Raptor Lake Next' die — pending Open forecast: ASUS has started U.S. retail of the Zenbook 14 (UX3480QA) in 8 GB and 16 — pending.2026-10-08Intel is preparingour brief ↗2026-10-10ASUS has started Uour brief ↗2026-10-11Akasa launches a four brief ↗2026-10-11INNO3D launches thour brief ↗2026-10-17Bare-die photos ofour brief ↗2026-10-18Intel said Razor Lour brief ↗this briefOpen forecast: Intel is preparing a Core 2000HX mobile family on 'Raptor Lake Next' die — pendingOpen forecast: ASUS has started U.S. retail of the Zenbook 14 (UX3480QA) in 8 GB and 16 — pending
  1. intel-s-core-2000hx-plan-brings-ddr4-support-back-to-high-end-laptop-cpus2026-10-08
  2. asus-zenbook-14-lands-at-u-s-best-buy-with-snapdragon-x-plus-an-intel-core-ultra-9-386h-sku-due-q4-20262026-10-10
  3. akasa-euler-mx2-fanless-mini-itx-case-targets-35-w-industrial-builds-without-moving-parts2026-10-11 · product launch
  4. inno3d-ags-6220v2-packs-eight-rtx-pro-6000-blackwell-server-gpus-in-6u-what-it-means-for-ai-rack-buyers2026-10-11 · product launch
  5. intel-nova-lake-hx-and-h-die-shots-surface-six-tile-mobile-package-mapped2026-10-17
  6. intel-razor-lake-ax-targets-700-tops-what-3-88x-panther-lake-means-for-mobile-ai-boms2026-10-18
  1. Intel is preparing a Core 2000HX mobile family on 'Raptor Lake Next' dies, reviving DDR4 compatibility for laptops while Nova Lake-HX takes the Core Ultra 4000HX name. trade
  2. ASUS has started U.S. retail of the Zenbook 14 (UX3480QA) in 8 GB and 16 GB variants, with an Intel Core Ultra 9 386H SKU slated for early Q4 2026. trade
  3. Akasa launches a fully passive aluminium Mini-ITX chassis with an integrated 220 W DC-DC board and dual 2.5" bays, aimed at POS, kiosks and edge boxes running Intel LGA1851 through LGA115X CPUs up to 35 W TDP. product launch trade
  4. INNO3D launches the 6U AGS-6220V2 rack server with eight PCIe Gen 5 RTX PRO 6000 Blackwell Server Edition GPUs, aimed at AI training and inference fleets. product launch trade
  5. Bare-die photos of Nova Lake-HX and -H lay out a six-tile mobile package using TSMC N2P, Intel 3-E and Intel 18A-P nodes, with new core counts and package sizes. trade
  6. Intel said Razor Lake-AX will deliver 700 TOPS at INT8/FP8, 3.88x Panther Lake's 180 TOPS, using a Xe3 iGPU up to 32 cores and bringing back on-package LPDDR5X/LPDDR6 memory. trade
  7. Minisforum announced the fanless 5-bay S5 NAS on Intel Core 3 304, with 5x M.2 NVMe, 10GbE + 2.5GbE, dual USB4, and an always-on local Agent runtime. product launch trade

The chain is built only from published briefs — a node without a brief is not drawn.

Cost pressure by dimension

Source: FRED · Generated · reference output z and composite are algorithm outputs, not a fetch snapshot

Cost pressure by dimension — composite stateDiverging bars for three dimensions around a zero midpoint. Input Cost has no reading; Supply Demand z -1.4711, notable; Fx Energy z 0.4541, neutral. Composite index -7.6, band neutral.0Input costno readingSupply/demandz −1.4711 · notable46 dFX & energyz +0.4541 · neutral6 dcomposite −7.6 · neutral−100 · −40 · −15 · 0 · +15 · +40 · +100
Underlying values — copyable for verification.
DimensionFRED series IDUnitLagAs of
Input costPCOPPUSDM, PALUMUSDM, PNICKUSDMUSD/mt96 d
Supply/demandPCU334413334413, IPG3344Sindex(1982=100) / index(2017=100)46 d
FX & energyDEXCHUS, DCOILBRENTEU, DHHNGSPrate / USD/bbl / USD/MMBtu6 d

No free authoritative interface for: gold · silver · rare earth · polysilicon · lithium carbonate · market share — listed rather than approximated.

How this was produced

Process evidence — fetch, source sanity, model and gate
Audit trail for this brief
Source fetched TechPowerUp · www.techpowerup.com · 2,057 chars · fetch status success
Source sanity (S1) ok — passed before any model call (no s1_ block recorded)
Model / prompt MiniMax-M3 · prompt Blog Agent - News Summary (v2.8-final) · 6,733 tokens · 30.6s · run completed
Gate verdict pass · 6/6 applicable checks passed · spec v2.9 · C10 ratio 0.050996 · C10 rounds 0
Time contract 5 <time datetime> values in this brief — 0 violations (+08:00 or date-only)

Every row above is produced by the pipeline, not written by hand.

Editorial score

Deterministic gate result — pure PHP, no model involvement in the verdict
Gate score breakdown 6 applicable checks, 6 passed: 100 percent. No hold items or mandatory failures. Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.573. Applicable checks passed 6 / 6 = 100% · verdict: pass No hold items or mandatory failures Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.573 The gate decides publication. The independent audit score is advisory only.

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Sources

  1. Intel "Razor Lake-AX" to Pack 700 TOPS of AI Compute — https://www.techpowerup.com/353825/intel-razor-lake-ax-to-pack-700-tops-of-ai-compute · rss · accessed

Facts are marked S1/S2 and trace to the linked source. Passages labelled analysis are XAIPART's own reasoning, kept separate from reported facts. Source links are followed rather than nofollow — attribution is intentional.