10AS032H1F35E1HG vs 10AS032H2F34E2LG Comparison
Detailed side-by-side comparison of 10AS032H1F35E1HG by Intel and 10AS032H2F34E2LG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AS032H1F35E1HG | 10AS032H2F34E2LG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2,540.00 | $1,380.00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Arria 10 SX | — |
| Device Type | System on Chip (SoC) FPGA | — |
| Logic Elements | 320K | 320,000 |
| Hard Processor Subsystem (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| Package | 1152-FBGA, FC (Flip-Chip BGA), 35x35 mm | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| User I/O Count | 384 | — |
| Process Technology | 20nm TSMC | — |
| Embedded Memory | M20K blocks (variable, density per family) | — |
| DSP Blocks | Variable-precision DSP blocks | Variable-precision, IEEE 754 single-precision FP support |
| Transceivers | Multi-gigabit transceivers (up to 24 channels, family-wide) | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] |
| External Memory Interfaces | DDR4, DDR3, RLDRAM3, QDRII+ | — |
| Hard Memory Controller | Yes | — |
| Hard PCIe | PCI Express Gen3 controllers (hard IP) | — |
| Partial Reconfiguration | Supported | — |
| Operating Temperature | Industrial / Extended grade (per part suffix) | — |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Family | — | Arria 10 SX |
| Device Tier | — | 10AS032 (mid-density) |
| Configuration | — | SoC FPGA (HPS + FPGA fabric) |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Operating Frequency | — | 1.5 GHz |
| Speed Grade | — | 2 |
| Temperature Grade | — | E2 (commercial/extended) |
| On-chip Memory (M20K blocks) | — | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] |
| Memory Controller Hard IP | — | DDR4, DDR3, QDRII+, RLDRAM3 |
| Process Node | — | 20 nm |
| Form of Terminal | — | Ball (BGA) |
| Terminal Pitch | — | 1 mm |