10AS032H2F35E2SG vs 10AS032H2F35E1HG Comparison
Detailed side-by-side comparison of 10AS032H2F35E2SG by Intel and 10AS032H2F35E1HG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AS032H2F35E2SG | 10AS032H2F35E1HG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,325.00 | $1,293.00 |
| Series | Arria 10 SX | — |
| Family | 10AS032 (F35 package) | — |
| Core Type | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320K | 320,000 |
| Core Frequency | 1.5 GHz (HPS) | — |
| Package | 1152-FCBGA, FC (35x35 mm) | 1152-ball FCBGA (35 x 35 mm) |
| Pin Count | 1152 | — |
| Mounting Type | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Temperature Grade | E2 (industrial / extended) | — |
| Speed Grade | H2 | — |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | — |
| Supply Voltage | [DATA_NEEDED: core/IO/transceiver voltage] | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| DSP Blocks | Variable-precision hardened DSP blocks | — |
| Transceivers | Multi-gigabit transceivers (per Arria 10 family) | — |
| Hard Memory Controllers | DDR3/DDR4 hard controllers | — |
| PCI Express | Hard IP for PCIe Gen2/Gen3 | — |
| Embedded Memory | On-chip M20K + MLAB memory | — |
| RoHS Status | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Process Technology | 20 nm | — |
| Design Tool | Intel Quartus Prime | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| Process Node | — | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Configuration | — | Serial (E1 suffix) |
| MSL Level | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |