10AX115N2F40I2SG vs 10AX115N4F40I3SG Comparison

Detailed side-by-side comparison of 10AX115N2F40I2SG by Intel and 10AX115N4F40I3SG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter 10AX115N2F40I2SG 10AX115N4F40I3SG
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $3,750.00 $3,500.00
Family Arria 10 GX Arria 10 GX
Logic Elements 1,150,000 —
Embedded Memory Bits 68,857,856 68,857,856
Adaptive Logic Modules (ALMs) 427,200 —
Registers 1,708,800 —
User I/O 600 —
Transceiver Protocol GX (up to 14.1 Gbps) —
Transceiver Count [DATA_NEEDED: transceiver count exact value] [DATA_NEEDED: transceiver count]
DSP Blocks Variable-precision, hard floating-point [DATA_NEEDED: DSP block count]
Package 1517-ball FCBGA, 40 x 40 mm, 1.0 mm pitch 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch
Operating Temperature -40C to +100C (Industrial) -40C to +100C (Industrial)
Speed Grade 2 —
Process Technology TSMC 20 nm —
RoHS Status Compliant Compliant
Mounting Type Surface Mount (flip-chip BGA) Surface Mount (BGA)
Logic Elements (LE) — 1,150,000
Adaptive Logic Modules (ALM) — [DATA_NEEDED: ALM count]
Maximum User I/O — 600
Maximum Transceiver Data Rate — 17.4 Gbps
Process Node — 20 nm
Supply Voltage (Core) — [DATA_NEEDED: VCC core voltage]
Configuration — Serial, Parallel, and Avalon-ST supported
MSL Level — 3 (per JEDEC J-STD-020)
Hardened IP — PCIe Gen3, 100G Ethernet MAC (per Quartus IP library)
Device Family Position — Mid-range 20 nm transceiver FPGA

Datasheets & Resources

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