10AX115N4F45I3SG vs 10AX115N4F40I3SG Comparison
Detailed side-by-side comparison of 10AX115N4F45I3SG by Intel and 10AX115N4F40I3SG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AX115N4F45I3SG | 10AX115N4F40I3SG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4,725.00 | $3,500.00 |
| Series | Arria 10 GX | — |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | [DATA_NEEDED: ALM count] |
| Embedded Memory | 68,857,856 bits | — |
| DSP Blocks | 1,518 (variable precision) | [DATA_NEEDED: DSP block count] |
| User I/O Pins | 768 | — |
| Transceivers | 24 (up to 17.4 Gbps) | — |
| Process Technology | 20 nm TSMC + 28 nm hard IP | — |
| Core Voltage | 0.85 V to 0.95 V (SmartVID) | — |
| Hard Memory Controllers | DDR4/3 and LPDDR3 | — |
| Hard PCIe Gen3 | x8 Gen3 (Gen2 x8 compatible) | — |
| Package | 1932-ball FC-FBGA | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Configuration Device | Internal, supports serial/parallel flash | — |
| RoHS Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Moisture Sensitivity Level (MSL) | [DATA_NEEDED: MSL] | — |
| Supply Voltage Range | 0.85 V to 0.95 V core | — |
| Family | — | Arria 10 GX |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Mounting Type | — | Surface Mount (BGA) |
| Operating Temperature | — | -40C to +100C (Industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| MSL Level | — | 3 (per JEDEC J-STD-020) |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |