10AX115N4F45I3SG vs 10AX115N4F40I3SG Comparación
Comparación detallada lado a lado de 10AX115N4F45I3SG por Intel y 10AX115N4F40I3SG por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | 10AX115N4F45I3SG | 10AX115N4F40I3SG |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4.725,00 | $3.500,00 |
| Series | Arria 10 GX | — |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | [DATA_NEEDED: ALM count] |
| Embedded Memory | 68,857,856 bits | — |
| DSP Blocks | 1,518 (variable precision) | [DATA_NEEDED: DSP block count] |
| User I/O Pins | 768 | — |
| Transceivers | 24 (up to 17.4 Gbps) | — |
| Process Technology | 20 nm TSMC + 28 nm hard IP | — |
| Core Voltage | 0.85 V to 0.95 V (SmartVID) | — |
| Hard Memory Controllers | DDR4/3 and LPDDR3 | — |
| Hard PCIe Gen3 | x8 Gen3 (Gen2 x8 compatible) | — |
| Encapsulado | 1932-ball FC-FBGA | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch |
| Temperature Grade | Industrial (-40C to +100C) | — |
| Configuration Device | Internal, supports serial/parallel flash | — |
| Estado RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Nivel de sensibilidad a la humedad (MSL) | [DATA_NEEDED: MSL] | — |
| Supply Voltage Range | 0.85 V to 0.95 V core | — |
| Family | — | Arria 10 GX |
| Embedded Memory Bits | — | 68,857,856 |
| Maximum User I/O | — | 600 |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| Process Node | — | 20 nm |
| Tipo de montaje | — | Surface Mount (BGA) |
| Temperatura de funcionamiento | — | -40C to +100C (Industrial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCC core voltage] |
| Configuration | — | Serial, Parallel, and Avalon-ST supported |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |
| Hardened IP | — | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) |
| Device Family Position | — | Mid-range 20 nm transceiver FPGA |