10CL006ZE144I8G vs 10CL010YE144C6G Comparison
Detailed side-by-side comparison of 10CL006ZE144I8G by Altera and 10CL010YE144C6G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
10CL010YE144C6G - Cyclone 10 LP FPGA 10K LE, 144-LQFP | Altera/Intel
10CL010YE144C6G ✓ ActiveSpecification Comparison
| Parameter | 10CL006ZE144I8G | 10CL010YE144C6G |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $35.88 | $2.60 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Cyclone 10 LP | — |
| Logic Cell Count | 6,272 cells | — |
| Embedded Memory | 276,480 bits | 423,936 bits (M9K blocks) |
| User I/O Count | 88 I/O | 88 |
| Package Type | 144-pin LQFP with exposed pad | — |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Logic Technology | FPGA | — |
| Configuration Storage Technology | [DATA_NEEDED: configuration memory technology] | — |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage] | — |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | 0C to +85C (commercial) |
| Speed Grade | [DATA_NEEDED: speed grade] | 6 |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Cyclone 10 LP |
| Series | — | Cyclone 10 |
| Device Model | — | 10CL010 |
| Logic Elements (LE) | — | 10,320 |
| Package | — | 144-LQFP Exposed Pad (EQFP-144) |
| Temperature Grade | — | Commercial (C) |
| Process Technology | — | TSMC 60 nm low-power |
| Number of Pins | — | 144 |
| Programmable Logic Type | — | FPGA (in-system programmable via SRAM) |
| Configuration Method | — | Active serial (AS), passive serial (PS), JTAG |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |
| MSL Level | — | 3 (per JEDEC J-STD-020) |