10CL006ZE144I8G vs 10CL010YE144C6G Comparación
Comparación detallada lado a lado de 10CL006ZE144I8G por Altera y 10CL010YE144C6G por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
10CL010YE144C6G - Cyclone 10 LP FPGA 10K LE, 144-LQFP | Altera/Intel
10CL010YE144C6G ✓ ActivoComparación de especificaciones
| Parámetro | 10CL006ZE144I8G | 10CL010YE144C6G |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $35,88 | $2,60 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Product Family | Cyclone 10 LP | — |
| Logic Cell Count | 6,272 cells | — |
| Embedded Memory | 276,480 bits | 423,936 bits (M9K blocks) |
| User I/O Count | 88 I/O | 88 |
| Package Type | 144-pin LQFP with exposed pad | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programmable Logic Technology | FPGA | — |
| Configuration Storage Technology | [DATA_NEEDED: configuration memory technology] | — |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage] | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +85C (commercial) |
| Speed Grade | [DATA_NEEDED: speed grade] | 6 |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Cyclone 10 LP |
| Series | — | Cyclone 10 |
| Device Model | — | 10CL010 |
| Logic Elements (LE) | — | 10,320 |
| Encapsulado | — | 144-LQFP Exposed Pad (EQFP-144) |
| Temperature Grade | — | Commercial (C) |
| Process Technology | — | TSMC 60 nm low-power |
| Número de pines | — | 144 |
| Programmable Logic Type | — | FPGA (in-system programmable via SRAM) |
| Configuration Method | — | Active serial (AS), passive serial (PS), JTAG |
| Lead-Free / Halogen-Free | — | Yes / [DATA_NEEDED: halogen-free status] |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |