10CL010YE144C6G vs 10CL025YE144C6G Comparison
Detailed side-by-side comparison of 10CL010YE144C6G by Altera and 10CL025YE144C6G by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
10CL010YE144C6G - Cyclone 10 LP FPGA 10K LE, 144-LQFP | Altera/Intel
10CL010YE144C6G ✓ ActiveSpecification Comparison
| Parameter | 10CL010YE144C6G | 10CL025YE144C6G |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.60 | $21.89 |
| Family | Cyclone 10 LP | Cyclone 10 LP Field Programmable Gate Array |
| Series | Cyclone 10 | Cyclone 10 LP |
| Device Model | 10CL010 | — |
| Logic Elements (LE) | 10,320 | — |
| Embedded Memory | 423,936 bits (M9K blocks) | — |
| User I/O Count | 88 | 76 |
| Package | 144-LQFP Exposed Pad (EQFP-144) | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm |
| Speed Grade | 6 | 6 (fastest commercial) |
| Temperature Grade | Commercial (C) | — |
| Process Technology | TSMC 60 nm low-power | — |
| Number of Pins | 144 | — |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Logic Type | FPGA (in-system programmable via SRAM) | — |
| Configuration Method | Active serial (AS), passive serial (PS), JTAG | — |
| Operating Temperature Range | 0C to +85C (commercial) | — |
| RoHS Status | Compliant | — |
| Lead-Free / Halogen-Free | Yes / [DATA_NEEDED: halogen-free status] | — |
| MSL Level | 3 (per JEDEC J-STD-020) | — |
| Logic Elements (LEs) | — | 24,624 |
| Embedded Memory (bits) | — | 608,256 |
| Memory Blocks | — | M9K blocks, 76 total |
| 18x18 Hardware Multipliers | — | 156 |
| Logic Array Blocks (LABs) | — | 1,539 |
| PLLs | — | 4 |
| Global Clocks | — | 20 |
| Core Voltage | — | 1.0 V (typical) |
| Process Node | — | 60 nm low-power CMOS |
| Operating Temperature | — | 0C to +85C (commercial) |
| Lead-Free / RoHS | — | Compliant |
| Configuration Scheme | — | SRAM-based, via JTAG / Active Serial / Active Parallel |