5CSEBA2U19C7SN vs 5CSEBA2U19C7N Comparison

Detailed side-by-side comparison of 5CSEBA2U19C7SN by Altera and 5CSEBA2U19C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter 5CSEBA2U19C7SN 5CSEBA2U19C7N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $40.33 $16.90
Family Cyclone V SE FPGA SoC Cyclone V SE SoC FPGA
Device Variant 5CSEA2 (single-core ARM Cortex-A9) —
Logic Elements 25,000 25,000 LE
Processor Hard Core Single ARM Cortex-A9 MPCore with CoreSight —
Maximum Processor Frequency 800 MHz —
User I/O Count 161 (5CSEBA2 variant) —
Package 484-UBGA (19x19 mm) 484-pin UBGA (19x19 mm, 1.0 mm pitch)
Speed Grade C7 (commercial) C7
Operating Temperature 0C to +85C (commercial, C7 suffix) Commercial / Industrial (TJ from data)
Process Technology TSMC 28 nm low-power TSMC 28 nm low-power
Memory Blocks M10K + MLAB embedded RAM —
DSP Blocks Variable-precision DSP 66 (variable-precision 18x18)
HPS Memory Controller DDR2, DDR3, LPDDR2, LPDDR —
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
RoHS Status Compliant Compliant
MSL Level 3 (per JEDEC J-STD-020) [DATA_NEEDED: MSL rating]
Adaptive Logic Modules (ALMs) — 9,430 ALM
ALUTs — 9,430
Embedded Memory — 1,400 Kbits (M9K + MLAB)
HPS Processor — Dual ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Clock Frequency — 925 MHz
L1 Cache (per core) — 32 KB I-cache + 32 KB D-cache
L2 Cache — 512 KB shared
User I/O Pins — [DATA_NEEDED: exact user I/O count]

Datasheets & Resources

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