5CSEBA2U19C7SN vs 5CSEBA2U19C7N 比較
詳細な並列比較: 5CSEBA2U19C7SN メーカー: Altera および 5CSEBA2U19C7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 5CSEBA2U19C7SN | 5CSEBA2U19C7N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $40.33 | $16.90 |
| Family | Cyclone V SE FPGA SoC | Cyclone V SE SoC FPGA |
| Device Variant | 5CSEA2 (single-core ARM Cortex-A9) | — |
| Logic Elements | 25,000 | 25,000 LE |
| Processor Hard Core | Single ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Processor Frequency | 800 MHz | — |
| User I/O Count | 161 (5CSEBA2 variant) | — |
| パッケージ | 484-UBGA (19x19 mm) | 484-pin UBGA (19x19 mm, 1.0 mm pitch) |
| Speed Grade | C7 (commercial) | C7 |
| 動作温度 | 0C to +85C (commercial, C7 suffix) | Commercial / Industrial (TJ from data) |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| Memory Blocks | M10K + MLAB embedded RAM | — |
| DSP Blocks | Variable-precision DSP | 66 (variable-precision 18x18) |
| HPS Memory Controller | DDR2, DDR3, LPDDR2, LPDDR | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS ステータス | Compliant | Compliant |
| MSLレベル | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| Adaptive Logic Modules (ALMs) | — | 9,430 ALM |
| ALUTs | — | 9,430 |
| Embedded Memory | — | 1,400 Kbits (M9K + MLAB) |
| HPS Processor | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Clock Frequency | — | 925 MHz |
| L1 Cache (per core) | — | 32 KB I-cache + 32 KB D-cache |
| L2 Cache | — | 512 KB shared |
| User I/O Pins | — | [DATA_NEEDED: exact user I/O count] |