5CSEBA4U19I7SN vs 5CSEBA4U19C7SN Comparison

Detailed side-by-side comparison of 5CSEBA4U19I7SN by Intel and 5CSEBA4U19C7SN by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter 5CSEBA4U19I7SN 5CSEBA4U19C7SN
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $145.00 $218.00
Series Cyclone V SE SoC FPGA —
Device Family Cyclone V —
Logic Elements 40,000 40 K
Hard Processor System (HPS) Single ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 800 MHz 800 MHz
Package 484-pin UBG A (19x19 mm) 484-UBGA (UBGLA) 19x19 mm
Mounting Type Surface Mount Surface Mount (BGA)
Operating Temperature -40C to +100C (Industrial) Commercial (0C to 85C, per 'C' suffix)
Process Node 28 nm low-power —
Supply Voltage (Core) 1.1 V (typical) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) —
Embedded Memory [DATA_NEEDED: total Kbits of M9K blocks] —
18x18 Hardware Multipliers [DATA_NEEDED: count] —
PLLs [DATA_NEEDED: count] —
Transceivers Not applicable (SE family, transceiver-less) —
PCI Express Hard IP Gen1 capable (rootport/endpoint) —
DDR Memory Support DDR2/DDR3/LPDDR2 via HPS and FPGA fabric —
RoHS Status Compliant Compliant
Family — Cyclone V SE SoC FPGA
Hard Processor System — Single ARM Cortex-A9 MPCore with CoreSight
Process Technology — 28 nm low-power
Core Voltage (FPGA fabric) — 1.1 V
Package Code — FBGA (U19)
User I/O (approx.) — 161
I/O Standards — LVDS, LVCMOS, SSTL (1.0 V to 3.3 V)
Memory Controller — DDR3 / LPDDR2 hard controller
DSP Blocks — Variable-precision DSP blocks
Configuration Modes — JTAG, AS, PS, FPP
Bitstream Encryption — AES (256-bit)
MSL Level — [DATA_NEEDED: MSL rating]

Datasheets & Resources

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