5M40ZM64C5N vs 5M80ZM64C5N Comparison

Detailed side-by-side comparison of 5M40ZM64C5N by Altera and 5M80ZM64C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter 5M40ZM64C5N 5M80ZM64C5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $1.45 $1.61
Family MAX V —
Device Logic Elements 40 —
Macrocells 32 —
Maximum Internal Frequency 118.3 MHz 118.3 MHz
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
Supply Voltage - Core (VCCINT) 1.8 V —
I/O Voltage Banks 1.5 V / 1.8 V / 2.5 V / 3.3 V tolerant —
Programmable I/O Pins 30 (approximate, per MAX V 5M40Z datasheet family) —
User Flash Memory 8 Kbits —
Configuration Method Non-volatile flash, instant-on, single-chip —
Programming Interface JTAG (IEEE 1149.1) ISP —
Standby Current (ICCSTBY) 55 µA typical —
Operating Temperature Range 0 °C to +85 °C (commercial) [DATA_NEEDED: operating temperature range]
Package 64-ball MBGA, 5 mm × 5 mm 64-MBGA
RoHS Status Compliant unknown
Mounting Type Surface Mount (BGA) —
Device Type — CPLD (Complex Programmable Logic Device)
Architecture Family — MAX V
Macrocell Count — 64 macrocells
Propagation Delay — 7.5 ns
User I/O Count — 30 I/Os
Programmable Logic Type — FLASH
Technology — CMOS
Package Pin Count — 64 pins
Supply Voltage — [DATA_NEEDED: supply voltage]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
REACH Status — unknown
AEC-Q100 Qualification — unknown
Lead-Free Status — unknown
Halogen-Free Status — unknown
JTAG Support — [DATA_NEEDED: JTAG support]

Datasheets & Resources

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