5M40ZM64C5N vs 5M80ZM64C5N 对比

详细并排对比 5M40ZM64C5N 出自 Altera 和 5M80ZM64C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M40ZM64C5N 5M80ZM64C5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $1.45 $1.61
Family MAX V —
Device Logic Elements 40 —
Macrocells 32 —
Maximum Internal Frequency 118.3 MHz 118.3 MHz
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
Supply Voltage - Core (VCCINT) 1.8 V —
I/O Voltage Banks 1.5 V / 1.8 V / 2.5 V / 3.3 V tolerant —
Programmable I/O Pins 30 (approximate, per MAX V 5M40Z datasheet family) —
User Flash Memory 8 Kbits —
Configuration Method Non-volatile flash, instant-on, single-chip —
Programming Interface JTAG (IEEE 1149.1) ISP —
Standby Current (ICCSTBY) 55 µA typical —
工作温度范围 0 °C to +85 °C (commercial) [DATA_NEEDED: operating temperature range]
封装 64-ball MBGA, 5 mm × 5 mm 64-MBGA
RoHS 状态 Compliant unknown
安装类型 Surface Mount (BGA) —
Device Type — CPLD (Complex Programmable Logic Device)
Architecture Family — MAX V
Macrocell Count — 64 macrocells
Propagation Delay — 7.5 ns
User I/O Count — 30 I/Os
Programmable Logic Type — FLASH
Technology — CMOS
Package Pin Count — 64 pins
电源电压 — [DATA_NEEDED: supply voltage]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
REACH Status — unknown
AEC-Q100 Qualification — unknown
Lead-Free Status — unknown
Halogen-Free Status — unknown
JTAG Support — [DATA_NEEDED: JTAG support]

数据手册与资源

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