EP1810LC-25 vs EP1810LC-45 Comparison

Detailed side-by-side comparison of EP1810LC-25 by Altera and EP1810LC-45 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1810LC-25 EP1810LC-45
Brand Altera Rochester Electronics
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.40 $49.90
Product Family Altera Classic EPLD —
Part Number EP1810LC-25 —
Macrocells 48 —
Propagation Delay (tPD) 25 ns —
Dedicated Inputs 12 —
I/O Pins 48 —
External Clock Inputs 4 —
Supply Voltage (VCC) 5 V (TTL-compatible) —
Operating Mode Turbo-only (no slow-power mode) —
Package 68-pin JLCC (J-leaded ceramic chip carrier) 68-pin PLCC (J-lead)
Package Code LC = 68-pin JLCC —
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
Technology CMOS EPLD (erasable programmable logic device) —
Programmable Interconnect Global + Local buses —
Programming Method Altera Classic programmer + MAX+PLUS II legacy flow —
Lifecycle Status Obsolete (legacy Altera Classic family) —
RoHS Status [DATA_NEEDED: RoHS compliance not confirmed in legacy datasheet] [DATA_NEEDED: RoHS status of Rochester-sourced part]
Operating Temperature [DATA_NEEDED: temperature grade for LC package] 0 °C to +70 °C (commercial)
Family — Altera Classic EPLD
Device Type — EPLD (Erasable Programmable Logic Device)
Usable Gates — 900
Macro Cells — 48
Maximum Inputs — 64
Maximum Outputs — 48
Logic Array Blocks — 4
Propagation Delay (tpd) — 45 ns
Maximum Operating Frequency — 22.2 MHz
Supply Voltage (Vcc) — 5 V (±5%)
Process Technology — 5 V CMOS EPROM
Lead-Free — [DATA_NEEDED: lead-free finish]

Datasheets & Resources

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