EP1810LC-35 vs EP1810JC-45 Comparison

Detailed side-by-side comparison of EP1810LC-35 by Rochester Electronics and EP1810JC-45 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Rochester Electronics
EP1810LC-35 EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera

EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera

EP1810LC-35 ⚠ Last Time Buy

Specification Comparison

Parameter EP1810LC-35 EP1810JC-45
Brand Rochester Electronics Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy NRND
Stock Status In Stock In Stock
Unit Price (USD) $49.20 $21.10
Device Type EPLD (Erasable Programmable Logic Device) —
Series Classic EP1810 —
Macrocells 48 48
Equivalent Gates 900 usable / 2100 equivalent 2100 gates
Maximum Operating Frequency 28.6 MHz —
Propagation Delay (tpd) 35 ns (max, '-35' speed grade) 45 ns
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Technology CMOS, UV-erasable EPROM CMOS, UV-erasable
Package 68-pin PLCC (J-Lead) PLCC-68 (QCCJ, J-Lead, windowed ceramic)
Mounting Type Surface Mount (socketable) Surface Mount
Operating Temperature 0C to +70C (commercial) —
I/O Pins [DATA_NEEDED: I/O count exact] 48
Configuration Method UV-erase + EPROM programmer —
Programmable Interconnect Centralized Programmable Interconnect Array (PIA) —
Development Tool (legacy) MAX+PLUS II / A+PLUS —
RoHS Status [DATA_NEEDED] [DATA_NEEDED: RoHS compliance not stated in verified data]
Lead-Free [DATA_NEEDED] —
Product Type — Classic EPLD (Erasable Programmable Logic Device)
Family — EP1810 (Classic EPLD Family)
Dedicated Inputs — 12
Total User I/O — 60
Maximum Clock Frequency — 33.3 MHz
Maximum Supply Voltage — 5.25 V
Pin Count — 68
Package Code — QCCJ
Temperature Grade — Commercial

Datasheets & Resources

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