EP1AGX60EF1152I6N vs EP1AGX90EF1152C6N Comparison
Detailed side-by-side comparison of EP1AGX60EF1152I6N by Intel and EP1AGX90EF1152C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1AGX60EF1152I6N - Arria GX 60 FPGA, 60K LE, 1152-BGA | Intel / Altera
EP1AGX60EF1152I6N ObsoleteIntel
EP1AGX90EF1152C6N - 90K LE Arria GX FPGA, 1152-FBGA | Intel / Altera
EP1AGX90EF1152C6N ⚠ Last Time BuySpecification Comparison
| Parameter | EP1AGX60EF1152I6N | EP1AGX90EF1152C6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $142.00 | $270.00 |
| Series | Arria GX | — |
| Family | Arria GX FPGA | Arria GX |
| Logic Elements (LE) | 60,100 | — |
| Embedded Memory | 2,528,640 bits (≈2.4 Mbit) | — |
| LABs / CLBs | 3,005 | — |
| Total RAM Bits | 2,528,640 | — |
| User I/O Count | 514 | — |
| Transceiver Channels | 12 (3.125 Gbps, embedded CDR/SERDES) | — |
| 18 × 18 Hardware Multipliers | 252 | — |
| PLLs | 4 (one per quadrant) plus transceiver PLLs | — |
| Package | 1152-BBGA (FBGA-1152, 35 × 35 mm, 1.0 mm pitch) | 1152-FBGA (35 mm x 35 mm) |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Operating Temperature | -40 °C to +100 °C (Industrial, suffix I) | — |
| Speed Grade | 6 | C6 |
| Process Node | 90 nm | — |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT/VCC typical value] | — |
| Hard IP | PCI Express ×1/×4, Gigabit Ethernet MAC, 8B/10B encoder/decoder | — |
| Memory Interfaces | DDR, DDR2, QDRII, RLDRAM (external memory controller) | — |
| RoHS Status | Compliant (per distributor listing) | — |
| MSL Level | 3 (per JEDEC J-STD-020) | — |
| Logic Elements | — | 90,000 |
| Embedded Memory (bits) | — | 4,477,824 |
| Logic Array Blocks (LABs) | — | 4,511 |
| User I/Os | — | 538 |
| Supply Voltage - Core | — | 1.15 V to 1.25 V |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (commercial) |
| Lead Free / RoHS | — | Yes (N finish) |
| Transceivers | — | 3.125 Gbps multi-gigabit transceiver channels |
| Configuration Interface | — | JTAG boundary-scan |
| Introduction Date | — | May 01, 2007 |
| Estimated EOL Date | — | 2023 |