EP1C20F400C7N vs EP1C20F40017 Comparison
Detailed side-by-side comparison of EP1C20F400C7N by Altera and EP1C20F40017 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1C20F400C7N | EP1C20F40017 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $65.80 | $24.80 |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | 294,912 |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | 2 |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 µm SRAM |
| Core Voltage | 1.5 V | — |
| Speed Grade | -7 (commercial, ~405 MHz internal) | -17 |
| Operating Temperature | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Package | 400-ball FineLine BGA (FBGA) | FBGA-400 (FineLine BGA) |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS Status | Compliant (per Altera product page) | — |
| Logic Elements | — | 20,060 |
| M4K RAM Blocks | — | 64 |
| Maximum User I/O Pins | — | 301 |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage Standards | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Ball Pitch | — | 0.8 mm |
| Configuration Method | — | Serial (AS mode) or JTAG |