EP1C20F400C7N vs EP1C20F40017 Vergleich
Detaillierter Direktvergleich von EP1C20F400C7N von Altera und EP1C20F40017 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP1C20F400C7N | EP1C20F40017 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $65,80 | $24,80 |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | 294,912 |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | 2 |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 µm SRAM |
| Core Voltage | 1.5 V | — |
| Speed Grade | -7 (commercial, ~405 MHz internal) | -17 |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Gehäuse | 400-ball FineLine BGA (FBGA) | FBGA-400 (FineLine BGA) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS-Status | Compliant (per Altera product page) | — |
| Logic Elements | — | 20,060 |
| M4K RAM Blocks | — | 64 |
| Maximum User I/O Pins | — | 301 |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage Standards | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Ball Pitch | — | 0.8 mm |
| Configuration Method | — | Serial (AS mode) or JTAG |