EP1C20F400C7N vs EP1C20F400C7 Comparison
Detailed side-by-side comparison of EP1C20F400C7N by Altera and EP1C20F400C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1C20F400C7N | EP1C20F400C7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $65.80 | $48.90 |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | 2,006 |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | — |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | 2 |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 µm SRAM |
| Core Voltage | 1.5 V | 1.5 V |
| Speed Grade | -7 (commercial, ~405 MHz internal) | — |
| Operating Temperature | 0 °C to +85 °C (commercial) | 0°C to +85°C (commercial) |
| Package | 400-ball FineLine BGA (FBGA) | 400-ball FineLine BGA (FBGA-400) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | JTAG / Passive Serial / Passive Parallel |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS Status | Compliant (per Altera product page) | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 20,060 LE |
| Embedded Memory | — | 294,912 bits (288 kbit) |
| M4K Memory Blocks | — | 64 |
| Maximum User I/O | — | 301 |
| Global Clock Networks | — | 20 |
| Package Dimensions | — | 21 mm × 21 mm |
| Ball Pitch | — | 1.00 mm |