EP1M120B484C5 vs EP1M120B484I6 Comparison
Detailed side-by-side comparison of EP1M120B484C5 by Intel and EP1M120B484I6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1M120B484I6 - Mercury FPGA 120K LE 484-BGA Industrial | Intel
EP1M120B484I6 ⚠ Last Time BuySpecification Comparison
| Parameter | EP1M120B484C5 | EP1M120B484I6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Last Time Buy |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements | 4,800 | 120,000 |
| Typical Gates | 120,000 | — |
| Maximum User I/O | 303 | — |
| Package | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) | 484-BBGA, FCBGA (FineLine BGA) |
| Operating Temperature | 0C to +85C (commercial) | -40C to +100C (Industrial) |
| Speed Grade | 5 (slowest) | 6 |
| Core Voltage | 1.8 V | 1.5 V |
| Process Technology | 0.18 um CMOS | — |
| PLLs | 4 | — |
| Embedded RAM Bits | 49,152 | — |
| True LVDS Channels | Up to 34 pairs | — |
| Maximum LVDS Data Rate | 840 Mbps per channel | — |
| Configuration Scheme | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Peak Reflow Temperature | 220 C | 220 C |
| Lead-Free / RoHS | SnPb ball finish (non-RoHS by default) | — |
| Multipliers | Embedded in system blocks for DSP | — |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| LABs/CLBs | — | 303 |
| Total RAM Bits | — | 49,152 |
| Block RAM (Kbits) | — | 4,800 |
| Number of I/O Pins | — | 303 (max user I/O) |
| Ball Count | — | 484 |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| PLL Count | — | 4 |
| Clock Networks | — | 7 |
| RoHS Status | — | [DATA_NEEDED: RoHS status] |
| Configuration Device Support | — | EPC4, EPC8, EPC16 |