EP1M120B484C5 vs EP1M120B484I6 比較
詳細な並列比較: EP1M120B484C5 メーカー: Intel および EP1M120B484I6 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1M120B484C5 | EP1M120B484I6 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $65.00 | $213.75 |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements | 4,800 | 120,000 |
| Typical Gates | 120,000 | — |
| Maximum User I/O | 303 | — |
| パッケージ | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) | 484-BBGA, FCBGA (FineLine BGA) |
| 動作温度 | 0C to +85C (commercial) | -40C to +100C (Industrial) |
| Speed Grade | 5 (slowest) | 6 |
| Core Voltage | 1.8 V | 1.5 V |
| Process Technology | 0.18 um CMOS | — |
| PLLs | 4 | — |
| Embedded RAM Bits | 49,152 | — |
| True LVDS Channels | Up to 34 pairs | — |
| Maximum LVDS Data Rate | 840 Mbps per channel | — |
| Configuration Scheme | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Peak Reflow Temperature | 220 C | 220 C |
| Lead-Free / RoHS | SnPb ball finish (non-RoHS by default) | — |
| Multipliers | Embedded in system blocks for DSP | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| LABs/CLBs | — | 303 |
| Total RAM Bits | — | 49,152 |
| Block RAM (Kbits) | — | 4,800 |
| Number of I/O Pins | — | 303 (max user I/O) |
| Ball Count | — | 484 |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| PLL Count | — | 4 |
| Clock Networks | — | 7 |
| RoHS ステータス | — | [DATA_NEEDED: RoHS status] |
| Configuration Device Support | — | EPC4, EPC8, EPC16 |