EP1M350F780C7ES vs EP1M350F780C8 Comparison
Detailed side-by-side comparison of EP1M350F780C7ES by Intel and EP1M350F780C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1M350F780C8
EP1M350F780C8 - Mercury PLD FPGA 350K Gates 780-BGA | Altera
EP1M350F780C8 ObsoleteSpecification Comparison
| Parameter | EP1M350F780C7ES | EP1M350F780C8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $175.00 |
| Product Type | Field Programmable Gate Array (FPGA) | β |
| Logic Family | CMOS | β |
| User I/O Count | 486 pins | β |
| Total Package Pins | 780 pins | β |
| Package Type | FINE LINE BGA-780 | β |
| Package Category | 780-BBGA | β |
| Supply Voltage | 1.8 V | β |
| Maximum Stated Transceiver Data Rate | 1.25 Gbps | β |
| Channels Supported at 1.25 Gbps | 8 channels | β |
| Remaining Channel Limit | 10 channels at 1.0 Gbps or less | β |
| Operating Temperature | 0 C to 85 C | 0C to +85C (commercial) |
| Clock Data Recovery | Supported | β |
| High-Speed Transceivers | Integrated | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | unknown | unknown (legacy device) |
| REACH Status | unknown | β |
| Logic Element Count | [DATA_NEEDED: logic element count] | β |
| Embedded Memory Capacity | [DATA_NEEDED: embedded memory capacity] | β |
| Transceiver Count | [DATA_NEEDED: transceiver count] | β |
| Package Dimensions | [DATA_NEEDED: package dimensions] | β |
| Thermal Resistance | [DATA_NEEDED: junction-to-ambient thermal resistance] | β |
| Device Family | β | Altera APEX Mercury (EP1M) |
| Typical Gates | β | 350,000 |
| Maximum Logic Elements (LEs) | β | 12,160 |
| Embedded RAM Blocks | β | 4 dual-port RAM blocks |
| Package | β | 780-ball FineLine BGA |
| Speed Grade | β | C8 (commercial, speed bin 8) |
| Supply Voltage (Core) | β | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | β | 8 |
| Configuration Interface | β | IEEE 1532 / passive serial / JTAG |
| Maximum User I/O | β | [DATA_NEEDED: user I/O count] |
| In-System Programmability | β | Yes (ISP via JTAG) |
| MSL Level | β | [DATA_NEEDED: MSL rating] |