EP1S20B672C7N vs EP1S25B672C7N Comparison
Detailed side-by-side comparison of EP1S20B672C7N by Intel and EP1S25B672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S20B672C7N | EP1S25B672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $320.00 | $620.15 |
| Series | Stratix | β |
| Family | Stratix (original) | Stratix |
| Process Technology | 0.13 Β΅m CMOS | 130 nm |
| Logic Elements (LEs) | 18,460 | β |
| LABs / CLBs | 1,846 | β |
| Embedded Memory Bits | 1,669,248 bits | β |
| Maximum User I/O | 426 | β |
| Number of Pins / Balls | 672 | β |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 Γ 35 mm, 1.27 mm pitch) | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core, VCCINT) | 1.5 V | β |
| Operating Temperature | 0 Β°C to 85 Β°C (Commercial Extended) | 0 Β°C to 85 Β°C (Commercial) |
| Speed Grade | -7 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| Logic Family | CMOS | CMOS |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Compliant (per Intel/Altera product page) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Logic Elements / Cells | β | 25660 |
| Number of User I/O | β | 473 |
| Number of Pins | β | 672 |
| Supply Voltage (Core) | β | 1.5 V |
| Maximum Operating Frequency | β | 420.17 MHz |
| Configuration Method | β | SRAM-based, JTAG (IEEE 1149.1) |
| I/O Standards Supported | β | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Embedded Memory | β | TriMatrix RAM blocks |
| DSP Blocks | β | Yes (dedicated multiplier/accumulator) |
| PLLs | β | Yes (on-die) |