EP1S20B672C7N vs EP1S25B672C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S20B672C7N sa pamamagitan ng Intel at EP1S25B672C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S20B672C7N | EP1S25B672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | Stratix | — |
| Family | Stratix (original) | Stratix |
| Process Technology | 0.13 µm CMOS | 130 nm |
| Logic Elements (LEs) | 18,460 | — |
| LABs / CLBs | 1,846 | — |
| Embedded Memory Bits | 1,669,248 bits | — |
| Maximum User I/O | 426 | — |
| Number of Pins / Balls | 672 | — |
| Package Type | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core, VCCINT) | 1.5 V | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial Extended) | 0 °C to 85 °C (Commercial) |
| Speed Grade | -7 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Logic Family | CMOS | CMOS |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (per Intel/Altera product page) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements / Cells | — | 25660 |
| Number of User I/O | — | 473 |
| Bilang ng Pins | — | 672 |
| Supply Voltage (Core) | — | 1.5 V |
| Maximum Operating Frequency | — | 420.17 MHz |
| Configuration Method | — | SRAM-based, JTAG (IEEE 1149.1) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Embedded Memory | — | TriMatrix RAM blocks |
| DSP Blocks | — | Yes (dedicated multiplier/accumulator) |
| PLLs | — | Yes (on-die) |