EP1S20F672C6 vs EP1S20F672C7 Comparison
Detailed side-by-side comparison of EP1S20F672C6 by Altera and EP1S20F672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1S20F672C6 | EP1S20F672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $470.00 | $195.00 |
| Manufacturer | Altera (now Intel) | — |
| Series | Stratix | Stratix |
| Family | Stratix (first generation) | Altera Stratix FPGA |
| Process Technology | 0.13 µm CMOS | — |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Logic Array Blocks (LABs) | 1,846 | — |
| Embedded Memory Bits | 1,669,248 | 1,669,248 |
| Maximum User I/Os | 426 | — |
| Package | 672-ball FineLine BGA | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) |
| Package Code | F672 | — |
| Speed Grade | C6 | C7 |
| Operating Temperature | 0°C to +85°C (Commercial) | 0C to 85C (commercial) |
| Supply Voltage | Core 1.5 V, I/O programmable | — |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| User I/O Pins | — | 426 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Logic Family | — | CMOS, SRAM-based |
| Core Supply Voltage | — | 1.5 V |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| MSL Level | — | [DATA_NEEDED: MSL level] |
| Clock PLLs | — | Up to 10 |