EP1S60F1020C7 vs EP1SGX40FF1020C7 Comparison

Detailed side-by-side comparison of EP1S60F1020C7 by Altera and EP1SGX40FF1020C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP1SGX40FF1020C7 EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA

EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA

EP1SGX40FF1020C7 ⚠ Last Time Buy

Specification Comparison

Parameter EP1S60F1020C7 EP1SGX40FF1020C7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Stock Status In Stock In Stock
Unit Price (USD) $1,750.00 $750.00
Series Stratix Stratix GX
Family Stratix (EP1S60) Stratix GX (EP1SGX40)
Logic Elements 57,120 —
Total Memory Bits 5,215,104 —
Maximum User I/O 773 —
Package 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch 1020-ball FC-FBGA (S-PBGA-B1020)
Mounting Type Surface Mount Surface Mount
Logic Family CMOS —
Operating Temperature 0C to +85C (Commercial) 0 °C to 85 °C (commercial)
Core Supply Voltage 1.5 V —
Speed Grade 7 7 (-7, mid-speed)
Logic Cells / Logic Blocks 6,570 (per datasheet Section I nomenclature) —
DSP Blocks Embedded dedicated multiplier / adder blocks —
PLLs Up to 12 enhanced PLLs per die 8 enhanced + per-transceiver PLLs
Configuration Method Serial or parallel with optional decompression —
MSL Level 3 (per BGA moisture-sensitivity norms) —
RoHS Status Compliant (lead-free) Compliant
Logic Elements (LE) — 41,250
Configurable Logic Blocks (CLB) — 4,125
Embedded Memory (bits) — 3,423,744
User I/O Pins — 624
Number of Logic Array Blocks (LAB) — 4,125
Number of I/O Banks — 12
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (nominal 1.5 V)
Process Technology — CMOS
Package Dimensions — 33 mm × 33 mm
Ball Pitch — 1.00 mm
Configuration Modes — PS, PPS, PPA, JTAG, AS
DSP Blocks (9-bit) — 176
Transceiver Channels — 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps

Datasheets & Resources

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