EP1S80F1020C7 vs EP1S80F1020C6 Comparison

Detailed side-by-side comparison of EP1S80F1020C7 by Altera and EP1S80F1020C6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S80F1020C7 EP1S80F1020C6
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $1,180.00
Series Stratix Stratix
Logic Elements 79,040 79,040
System Gates (typical) 7,427,520 β€”
Logic Array Blocks (LABs) 7,904 β€”
User I/O Pins 773 β€”
Total Package Pins 1020 (ball) β€”
Package Type FBGA-1020 (33 x 33 mm, 1 mm pitch) FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch
Core Supply Voltage (VCCINT) 1.425 V to 1.575 V 1.5 V nominal (1.425 V to 1.575 V)
Operating Temperature 0 C to 85 C (Commercial) β€”
Logic Family CMOS, SRAM-based configuration β€”
Process Technology 1.5 V, 0.13 um CMOS 130 nm CMOS
Configuration Modes Passive Serial (PS), Fast Passive Parallel (FPP), JTAG β€”
PLLs 12 (per datasheet family) β€”
Memory TriMatrix embedded SRAM blocks β€”
DSP Blocks Dedicated hardware multipliers/accumulators β€”
Mounting Type Surface Mount (BGA) Surface Mount
RoHS Status Compliant (lead-free FBGA) [DATA_NEEDED: rohs status]
Total RAM Bits β€” 7,427,520
Number of Logic Blocks / LABs β€” 9,191
Number of I/O Pins (max) β€” 773 user I/O
Number of Pins / Balls β€” 1020
Speed Grade β€” C6
Operating Temperature (Commercial) β€” 0 C to +85 C
Maximum Internal Clock Frequency β€” 450.05 MHz
Family Description β€” FPGA - Field Programmable Gate Array
Embedded Memory β€” TriMatrix (three block sizes, true/simple dual-port)
Configuration Interface β€” JTAG (IEEE 1149.1) + serial/parallel configuration device
Design Tool β€” Quartus II (legacy, Stratix family)
Moisture Sensitivity Level (MSL) β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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