EP1S80F1020C7 vs EP1S80F1020C6 Perbandingan

Perbandingan bersamaan detil EP1S80F1020C7 dari Altera dan EP1S80F1020C6 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP1S80F1020C7 EP1S80F1020C6
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series Stratix Stratix
Logic Elements 79,040 79,040
System Gates (typical) 7,427,520 —
Logic Array Blocks (LABs) 7,904 —
User I/O Pins 773 —
Total Package Pins 1020 (ball) —
Package Type FBGA-1020 (33 x 33 mm, 1 mm pitch) FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch
Core Supply Voltage (VCCINT) 1.425 V to 1.575 V 1.5 V nominal (1.425 V to 1.575 V)
Suhu Kerja 0 C to 85 C (Commercial) —
Logic Family CMOS, SRAM-based configuration —
Process Technology 1.5 V, 0.13 um CMOS 130 nm CMOS
Configuration Modes Passive Serial (PS), Fast Passive Parallel (FPP), JTAG —
PLLs 12 (per datasheet family) —
Memory TriMatrix embedded SRAM blocks —
DSP Blocks Dedicated hardware multipliers/accumulators —
Tipe Mounting Surface Mount (BGA) Surface Mount
Status RoHS Compliant (lead-free FBGA) [DATA_NEEDED: rohs status]
Total RAM Bits — 7,427,520
Number of Logic Blocks / LABs — 9,191
Number of I/O Pins (max) — 773 user I/O
Number of Pins / Balls — 1020
Speed Grade — C6
Operating Temperature (Commercial) — 0 C to +85 C
Maximum Internal Clock Frequency — 450.05 MHz
Family Description — FPGA - Field Programmable Gate Array
Embedded Memory — TriMatrix (three block sizes, true/simple dual-port)
Configuration Interface — JTAG (IEEE 1149.1) + serial/parallel configuration device
Design Tool — Quartus II (legacy, Stratix family)
Tingkat Sensitivitas Kekeringan (MSL) — [DATA_NEEDED: MSL rating]

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