EP20K400FC672-3 vs EP20K400FI672-3 Comparison

Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400FI672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FC672-3 EP20K400FI672-3
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $138.00 $195.00
Family APEX 20K APEX 20K
Device Logic Elements 16,640 cells β€”
Typical Gate Count 400,000 system gates β€”
Maximum User I/Os 502 β€”
Propagation Delay 2.5 ns 3.6 ns
Internal Performance 167 MHz β€”
Process Technology 0.22 Β΅m CMOS CMOS
Core Supply Voltage 2.5 V β€”
Logic Family CMOS, SRAM-based β€”
Package 672-pin FC-FBGA β€”
Package Code BGA S-PBGA-B672
Number of Terminals 672 β€”
Terminal Form Ball (BGA) β€”
Speed Grade -3 (commercial fastest) β€”
Operating Temperature 0 Β°C to 85 Β°C [DATA_NEEDED: operating temperature range]
Mounting Type Surface Mount Surface Mount
Architecture MultiCore (LUT + Embedded System Blocks) β€”
Programming Method SRAM, JTAG (ByteBlaster) β€”
Lifecycle Status Obsolete / Legacy β€”
RoHS Status [DATA_NEEDED: RoHS status] β€”
Series β€” EP20K400
Logic Elements β€” 16640
Total Gates β€” up to 400000
Embedded RAM β€” 212992 bits
Maximum User I/O β€” 502
Dedicated Inputs β€” 6
Maximum Clock Frequency β€” 833 MHz
Supply Voltage (Nominal) β€” 2.5 V
Supply Voltage Range β€” 2.375 V to 2.625 V
Package Type β€” PBGA (Plastic BGA)
Terminal Count β€” 672
Terminal Pitch β€” 1.000 mm
Package Shape β€” Square BGA
Configuration Interface β€” JTAG (IEEE 1149.1)
MSL Level β€” 3
Peak Reflow Temperature β€” 220 C

Datasheets & Resources

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