EP20K400FC672-3 vs EP20K400FI672-3 比較
詳細並排比較 EP20K400FC672-3 由 Altera 與 EP20K400FI672-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400FC672-3 | EP20K400FI672-3 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Device Logic Elements | 16,640 cells | — |
| Typical Gate Count | 400,000 system gates | — |
| Maximum User I/Os | 502 | — |
| Propagation Delay | 2.5 ns | 3.6 ns |
| Internal Performance | 167 MHz | — |
| Process Technology | 0.22 µm CMOS | CMOS |
| Core Supply Voltage | 2.5 V | — |
| Logic Family | CMOS, SRAM-based | — |
| 封裝 | 672-pin FC-FBGA | — |
| Package Code | BGA | S-PBGA-B672 |
| Number of Terminals | 672 | — |
| Terminal Form | Ball (BGA) | — |
| Speed Grade | -3 (commercial fastest) | — |
| 工作溫度 | 0 °C to 85 °C | [DATA_NEEDED: operating temperature range] |
| 安裝類型 | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Method | SRAM, JTAG (ByteBlaster) | — |
| 生命週期狀態 | Obsolete / Legacy | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | — |
| Series | — | EP20K400 |
| Logic Elements | — | 16640 |
| Total Gates | — | up to 400000 |
| Embedded RAM | — | 212992 bits |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 6 |
| 最大時脈頻率 | — | 833 MHz |
| Supply Voltage (Nominal) | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Package Type | — | PBGA (Plastic BGA) |
| Terminal Count | — | 672 |
| Terminal Pitch | — | 1.000 mm |
| Package Shape | — | Square BGA |
| Configuration Interface | — | JTAG (IEEE 1149.1) |
| MSL 等級 | — | 3 |
| Peak Reflow Temperature | — | 220 C |