EP20K400FI672-1XN vs EP20K400EFC672-1XN Comparison
Detailed side-by-side comparison of EP20K400FI672-1XN by Intel and EP20K400EFC672-1XN by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-1XN | EP20K400EFC672-1XN |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $215.00 |
| Family | APEX 20K | APEX 20K |
| Device | EP20K400 | β |
| Typical Gates | 400,000 | β |
| Logic Elements | 16,640 | β |
| Maximum User I/O Pins | 488 | β |
| Embedded System Memory | 212 Kbit | β |
| Number of PLLs | 4 | β |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | β |
| I/O Supply Voltage | 2.5 V / 3.3 V | β |
| Process Technology | 0.18 micrometer CMOS | 0.18 Β΅m CMOS |
| Package | 672-ball FineLine BGA (FI672) | 672-BBGA (FC-FBGA, FineLine BGA) |
| Package Size | 27 mm x 27 mm | β |
| Operating Temperature | -40 C to +85 C (industrial) | β |
| Configuration Method | SRAM, JTAG, EPC serial PROM | β |
| JTAG Support | IEEE 1149.1 boundary-scan compliant | β |
| Speed Grade | -1 | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL Level | 3 | β |
| Series | β | APEX-20KE |
| Logic Elements / Cells | β | 16,640 |
| Logic Array Blocks (LABs) | β | 1,664 |
| System Gates | β | 400,000 |
| Total RAM Bits | β | 212,992 |
| User I/O | β | 488 |
| Number of I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Supply Voltage - Core | β | 1.8 V |
| I/O Voltage Standards | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Embedded PLLs | β | 4 |
| Maximum Internal Frequency | β | [DATA_NEEDED: max internal frequency] |
| Mounting Type | β | Surface Mount |
| Operating Temperature Grade | β | Industrial / Other (per MPN suffix) |
| Configuration Mode | β | Passive Serial / Passive Parallel / JTAG (IEEE 1149.1) |