EP20K400FI672-1XN vs EP20K400EFC672-1XN Comparaison
Comparaison détaillée côte à côte de EP20K400FI672-1XN par Intel et EP20K400EFC672-1XN par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400FI672-1XN | EP20K400EFC672-1XN |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $215,00 |
| Family | APEX 20K | APEX 20K |
| Device | EP20K400 | — |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/O Pins | 488 | — |
| Embedded System Memory | 212 Kbit | — |
| Number of PLLs | 4 | — |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Process Technology | 0.18 micrometer CMOS | 0.18 µm CMOS |
| Boîtier | 672-ball FineLine BGA (FI672) | 672-BBGA (FC-FBGA, FineLine BGA) |
| Package Size | 27 mm x 27 mm | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | — |
| Configuration Method | SRAM, JTAG, EPC serial PROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan compliant | — |
| Speed Grade | -1 | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Niveau MSL | 3 | — |
| Series | — | APEX-20KE |
| Logic Elements / Cells | — | 16,640 |
| Logic Array Blocks (LABs) | — | 1,664 |
| System Gates | — | 400,000 |
| Total RAM Bits | — | 212,992 |
| User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Supply Voltage - Core | — | 1.8 V |
| I/O Voltage Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Embedded PLLs | — | 4 |
| Maximum Internal Frequency | — | [DATA_NEEDED: max internal frequency] |
| Type de montage | — | Surface Mount |
| Operating Temperature Grade | — | Industrial / Other (per MPN suffix) |
| Configuration Mode | — | Passive Serial / Passive Parallel / JTAG (IEEE 1149.1) |