EP20K600CB652C7ES vs EP20K400CB652C7ES Comparison
Detailed side-by-side comparison of EP20K600CB652C7ES by Altera and EP20K400CB652C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CB652C7ES | EP20K400CB652C7ES |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $215.00 |
| Family | APEX 20KC | FPGA APEX 20KC |
| Logic Elements | 24,320 | β |
| System Gates | 600,000 | 400,000 |
| Maximum System Gates | 1,053,840 | β |
| Embedded Memory Bits | 311,296 | β |
| Embedded System Blocks (ESB) | 26 | β |
| Maximum User I/O | 488 | β |
| User I/O (this package) | 488 (652-BGA) | β |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | β |
| Maximum Internal Clock Frequency | 1666.6 MHz | β |
| Propagation Delay | 1.6 ns | 1.4 ns |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | [DATA_NEEDED: Operating temperature] |
| Package Type | 652-ball FineLine BGA | BGA (S-PBGA-B652) |
| JEDEC Package Code | S-PBGA-B652 | β |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | β |
| JTAG Boundary Scan | IEEE 1149.1 compliant | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| PLLs | 4 | β |
| Mounting Type | Surface Mount (BGA) | β |
| Series | β | APEX 20KC |
| Logic Cells | β | 16,640 |
| Number of Inputs | β | 488 |
| Number of I/O Lines | β | 484 |
| Number of Outputs | β | 484 |
| Maximum Clock Frequency | β | 1666.6 MHz |
| Internal Performance | β | 375.94 MHz |
| Core Supply Voltage | β | 1.8 V |
| Number of Terminals | β | 652 |
| Package Body Material | β | Plastic / Epoxy |
| Surface Mount | β | Yes |
| Speed Grade | β | C7 |