EP20K600CB652C7ES vs EP20K400CB652C7ES Vergleich
Detaillierter Direktvergleich von EP20K600CB652C7ES von Altera und EP20K400CB652C7ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CB652C7ES | EP20K400CB652C7ES |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $215,00 |
| Family | APEX 20KC | FPGA APEX 20KC |
| Logic Elements | 24,320 | — |
| System Gates | 600,000 | 400,000 |
| Maximum System Gates | 1,053,840 | — |
| Embedded Memory Bits | 311,296 | — |
| Embedded System Blocks (ESB) | 26 | — |
| Maximum User I/O | 488 | — |
| User I/O (this package) | 488 (652-BGA) | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Maximum Internal Clock Frequency | 1666.6 MHz | — |
| Propagation Delay | 1.6 ns | 1.4 ns |
| Process Technology | 0.15 µm CMOS | 0.15 µm |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | [DATA_NEEDED: Operating temperature] |
| Package Type | 652-ball FineLine BGA | BGA (S-PBGA-B652) |
| JEDEC Package Code | S-PBGA-B652 | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| PLLs | 4 | — |
| Montageart | Surface Mount (BGA) | — |
| Series | — | APEX 20KC |
| Logic Cells | — | 16,640 |
| Number of Inputs | — | 488 |
| Number of I/O Lines | — | 484 |
| Anzahl der Ausgänge | — | 484 |
| Maximale Taktfrequenz | — | 1666.6 MHz |
| Internal Performance | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| Number of Terminals | — | 652 |
| Package Body Material | — | Plastic / Epoxy |
| Surface Mount | — | Yes |
| Speed Grade | — | C7 |