EP20K600CB652C9 vs EP20K600CB652C9N Comparison

Detailed side-by-side comparison of EP20K600CB652C9 by Altera and EP20K600CB652C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C9 EP20K600CB652C9N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $142.50 $128.00
Family APEX 20KC APEX 20KC
Logic Elements / Cells 24,320 β€”
Number of LABs / CLBs 2,432 β€”
System Gates 1,537,000 β€”
Total RAM Bits 311,296 β€”
User I/O 488 β€”
Number of I/O Banks [DATA_NEEDED: I/O bank count] β€”
Supply Voltage 1.71 V to 1.89 V β€”
Process Technology 0.15 Β΅m all-layer copper CMOS 0.15 micron all-layer copper CMOS
Internal Datapath Frequency up to 250 MHz β€”
Propagation Delay (typ.) 1.48 ns β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) 0 C to 85 C (commercial)
Package 652-BGA (45 Γ— 45 mm, 1.27 mm pitch) BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
Configuration JTAG IEEE 1149.1 / serial / EPC2-compatible β€”
RoHS Status Compliant (per Altera product page) [DATA_NEEDED: rohs status]
Product Status Obsolete (per distributor listings) β€”
Device Type β€” Loadable PLD (FPGA)
Typical Gates β€” 600,000
Logic Elements β€” 24,320
Maximum User I/O β€” 488
Core Supply Voltage β€” 1.8 V
Speed Grade β€” C9 (~1.48 ns propagation delay)
Architecture β€” MultiCore LUT + embedded system memory (ESB)
On-chip Memory β€” Embedded system memory blocks (dual-port RAM, FIFO)
Configuration Interface β€” JTAG (IEEE 1149.1) and serial/PROM configuration
Pin/Pin Compatibility β€” Pin-compatible with APEX 20KE devices of same package
Toolchain β€” Altera/Intel Quartus II (legacy APEX support)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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