EP20K600CF672C8N vs EP20K600CF672-2 Comparison
Detailed side-by-side comparison of EP20K600CF672C8N by Intel and EP20K600CF672-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672C8N | EP20K600CF672-2 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $108.00 | $680.00 |
| Device Type | SPLD | β |
| Product Type | FPGA / programmable logic device | β |
| Family | APEX 20KC | β |
| Nominal Gate Capacity | 600K gates | β |
| Logic Elements or Cells | 24,320 | β |
| Macros | 2,432 | β |
| User I/O Count | 508 | β |
| Package Terminals | 652 pins | β |
| Package | BGA-652, 45 x 45 mm, 1.27 mm pitch | β |
| Package Description | 672-pin FC-FBGA | β |
| Supply Voltage | 1.8 V | β |
| Listed Frequency | 301.21 MHz | β |
| Propagation Delay | 1.48 ns | β |
| Fabrication Process | 0.15 Β΅m | β |
| Operating Temperature | 0Β°C to 85Β°C | 0 C to +60 C (TJ, per Alibaba supplier listing) |
| Interconnect Metal | All-layer copper metal | β |
| I/O Configuration | 508 user I/O | β |
| Mounting Type | Surface mount | Surface Mount |
| RoHS Status | unknown | [DATA_NEEDED: rohs_status] |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | unknown | β |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | β |
| Core Current | [DATA_NEEDED: core supply current] | β |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | β |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | β |
| Thermal Resistance | [DATA_NEEDED: junction-to-ambient thermal resistance] | β |
| Manufacturer | β | Intel / Altera |
| Series | β | APEX 20KC |
| Device Family | β | APEX 20KC PLD |
| Gate Count (typical) | β | 600,000 gates |
| Logic Elements | β | 30,720 |
| Embedded RAM (approx.) | β | 311,232 bits |
| Process Technology | β | 0.18 um CMOS |
| Speed Grade | β | -2 |
| Package Type | β | 672-ball FineLine BGA (FCBGA) |
| Configuration Mode | β | Enhanced Configuration (EPC) |
| Number of PLLs | β | 4 |
| I/O Standards | β | LVTTL, LVCMOS, and others per datasheet |
| Boundary Scan | β | IEEE 1149.1 (JTAG) |
| Lifecycle Status | β | Obsolete / last-time-buy |