EP20K600CF672C8N vs EP20K600CF672-2 比較
詳細な並列比較: EP20K600CF672C8N メーカー: Intel および EP20K600CF672-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K600CF672C8N | EP20K600CF672-2 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $108.00 | $680.00 |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | — |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| パッケージ | BGA-652, 45 x 45 mm, 1.27 mm pitch | — |
| Package Description | 672-pin FC-FBGA | — |
| 電源電圧 | 1.8 V | — |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Fabrication Process | 0.15 µm | — |
| 動作温度 | 0°C to 85°C | 0 C to +60 C (TJ, per Alibaba supplier listing) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| 実装タイプ | Surface mount | Surface Mount |
| RoHS ステータス | unknown | [DATA_NEEDED: rohs_status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | — |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| 熱抵抗 | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Manufacturer | — | Intel / Altera |
| Series | — | APEX 20KC |
| Device Family | — | APEX 20KC PLD |
| Gate Count (typical) | — | 600,000 gates |
| Logic Elements | — | 30,720 |
| Embedded RAM (approx.) | — | 311,232 bits |
| Process Technology | — | 0.18 um CMOS |
| Speed Grade | — | -2 |
| Package Type | — | 672-ball FineLine BGA (FCBGA) |
| Configuration Mode | — | Enhanced Configuration (EPC) |
| Number of PLLs | — | 4 |
| I/O Standards | — | LVTTL, LVCMOS, and others per datasheet |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| ライフサイクル状態 | — | Obsolete / last-time-buy |