EP20K600CF672C8N vs EP20K600CF672-2 比較

詳細並排比較 EP20K600CF672C8N 由 Intel 與 EP20K600CF672-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672C8N EP20K600CF672-2
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 Obsolete
Device Type SPLD —
Product Type FPGA / programmable logic device —
Family APEX 20KC —
Nominal Gate Capacity 600K gates —
Logic Elements or Cells 24,320 —
Macros 2,432 —
User I/O Count 508 —
Package Terminals 652 pins —
封裝 BGA-652, 45 x 45 mm, 1.27 mm pitch —
Package Description 672-pin FC-FBGA —
供應電壓 1.8 V —
Listed Frequency 301.21 MHz —
Propagation Delay 1.48 ns —
Fabrication Process 0.15 µm —
工作溫度 0°C to 85°C 0 C to +60 C (TJ, per Alibaba supplier listing)
Interconnect Metal All-layer copper metal —
I/O Configuration 508 user I/O —
安裝類型 Surface mount Surface Mount
RoHS 狀態 unknown [DATA_NEEDED: rohs_status]
REACH Status unknown —
AEC-Q100 Qualification unknown —
Configuration Method [DATA_NEEDED: configuration memory and programming method] —
Core Current [DATA_NEEDED: core supply current] —
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] —
Junction Temperature [DATA_NEEDED: maximum junction temperature] —
熱阻 [DATA_NEEDED: junction-to-ambient thermal resistance] —
Manufacturer — Intel / Altera
Series — APEX 20KC
Device Family — APEX 20KC PLD
Gate Count (typical) — 600,000 gates
Logic Elements — 30,720
Embedded RAM (approx.) — 311,232 bits
Process Technology — 0.18 um CMOS
Speed Grade — -2
Package Type — 672-ball FineLine BGA (FCBGA)
Configuration Mode — Enhanced Configuration (EPC)
Number of PLLs — 4
I/O Standards — LVTTL, LVCMOS, and others per datasheet
Boundary Scan — IEEE 1149.1 (JTAG)
生命週期狀態 — Obsolete / last-time-buy

資料表與資源

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