EP20K600CF672I8 vs EP20K600CF672I-8ES Comparison

Detailed side-by-side comparison of EP20K600CF672I8 by Altera and EP20K600CF672I-8ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672I8 EP20K600CF672I-8ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $119.00
Family APEX 20KC APEX 20KC
Device Type SPLD / FPGA β€”
Logic Elements / Cells 24,320 β€”
Macros (Logic Cells) 2432 β€”
Typical Gate Count 600,000 gates β€”
Embedded Memory 311,296 bits β€”
User I/Os 488 to 508 β€”
Number of Pins 652 (functional) / 672 (BGA balls) β€”
Propagation Delay (typical) 1.48 ns β€”
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] β€”
Core Supply Voltage 1.8 V β€”
Process Technology 0.15 Β΅m all-layer copper 0.18 micron CMOS SRAM
Operating Temperature 0 Β°C to +85 Β°C (Industrial) -40C to +100C (Industrial)
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch β€”
Mounting Type Surface Mount β€”
RoHS Status Compliant per legacy product records Non-compliant (legacy Altera leaded BGA process)
Configuration Interface JTAG / Passive Serial β€”
Design Tool Quartus II (legacy MAX+PLUS II) β€”
Logic Elements β€” 24,320
Typical Gates β€” 600,000 (ASIC-equivalent)
Embedded Memory Bits β€” 311,296
Maximum User I/O Pins β€” 508
Embedded PLLs β€” 4
Core Voltage β€” 1.8 V
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+
Speed Grade β€” -8 (slower)
Package β€” 672-ball BGA (FineLine BGA, 1.27 mm pitch)
Configuration Modes β€” Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG
In-System Programmability β€” Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1)
MSL Level β€” [DATA_NEEDED: moisture sensitivity level]

Datasheets & Resources

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