EP20K600CF672I8 vs EP20K600CF672I-8ES Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I8 sa pamamagitan ng Altera at EP20K600CF672I-8ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF672I8 EP20K600CF672I-8ES
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC APEX 20KC
Device Type SPLD / FPGA —
Logic Elements / Cells 24,320 —
Macros (Logic Cells) 2432 —
Typical Gate Count 600,000 gates —
Embedded Memory 311,296 bits —
User I/Os 488 to 508 —
Bilang ng Pins 652 (functional) / 672 (BGA balls) —
Propagation Delay (typical) 1.48 ns —
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper 0.18 micron CMOS SRAM
Temperature na Operasyon 0 °C to +85 °C (Industrial) -40C to +100C (Industrial)
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch —
Uri ng Pagpapasok Surface Mount —
Tindminan RoHS Compliant per legacy product records Non-compliant (legacy Altera leaded BGA process)
Configuration Interface JTAG / Passive Serial —
Design Tool Quartus II (legacy MAX+PLUS II) —
Logic Elements — 24,320
Typical Gates — 600,000 (ASIC-equivalent)
Embedded Memory Bits — 311,296
Maximum User I/O Pins — 508
Embedded PLLs — 4
Core Voltage — 1.8 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+
Speed Grade — -8 (slower)
Packhaging — 672-ball BGA (FineLine BGA, 1.27 mm pitch)
Configuration Modes — Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG
In-System Programmability — Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1)
Level ng MSL — [DATA_NEEDED: moisture sensitivity level]

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