EP20K600CF672I8 vs EP20K600CF672I9 Comparison

Detailed side-by-side comparison of EP20K600CF672I8 by Altera and EP20K600CF672I9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672I8 EP20K600CF672I9
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $152.00
Family APEX 20KC APEX 20KC
Device Type SPLD / FPGA β€”
Logic Elements / Cells 24,320 24,320
Macros (Logic Cells) 2432 β€”
Typical Gate Count 600,000 gates β€”
Embedded Memory 311,296 bits [DATA_NEEDED: total RAM bits]
User I/Os 488 to 508 β€”
Number of Pins 652 (functional) / 672 (BGA balls) β€”
Propagation Delay (typical) 1.48 ns β€”
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] β€”
Core Supply Voltage 1.8 V β€”
Process Technology 0.15 Β΅m all-layer copper 0.15 Β΅m CMOS
Operating Temperature 0 Β°C to +85 Β°C (Industrial) β€”
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status Compliant per legacy product records [DATA_NEEDED: RoHS status]
Configuration Interface JTAG / Passive Serial β€”
Design Tool Quartus II (legacy MAX+PLUS II) β€”
System Gates β€” 600,000
Maximum Operating Frequency β€” 250 MHz
Core Voltage β€” 1.8 V
Package β€” 672-pin FC-FBGA
Temperature Grade β€” Industrial (-40Β°C to +85Β°C)
Speed Grade β€” 9 (fastest bin)
User I/O Pins β€” 311 (max)
Embedded Array Blocks (EABs) β€” [DATA_NEEDED: EAB count]
PLLs β€” Up to 4
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, LVDS
Configuration Mode β€” Passive Serial / JTAG
Maximum Seated Height β€” 2.1 mm
MSL Level β€” [DATA_NEEDED: MSL level]
Lead-Free β€” [DATA_NEEDED: lead-free]

Datasheets & Resources

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