EP2A25F672I-9 vs EP2A25F672C8 Comparison

Detailed side-by-side comparison of EP2A25F672I-9 by Intel and EP2A25F672C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A25F672I-9 EP2A25F672C8
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $951.18
Family APEX II APEX II (EP2A25)
Logic Elements (typical) 25,000 β€”
Maximum System Gates [DATA_NEEDED: maximum system gates] 40,960
Embedded System Blocks (ESB) Memory 1,125 Kbits β€”
Maximum User I/O Pins [DATA_NEEDED: maximum user I/O pins] β€”
Number of PLLs 4 β€”
Process Technology 0.18 Β΅m CMOS 0.15 microm CMOS, 8-layer copper interconnect
Core Voltage 1.5 V / 1.8 V (speed-grade dependent) β€”
Operating Temperature Grade Industrial (-40 Β°C to +100 Β°C junction) β€”
Speed Grade -9 C8
Package 672-pin FCBGA (FineLine BGA) 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch)
Mounting Type Surface Mount (BGA) Surface Mount
Moisture Sensitivity Level (MSL) 3 (per Vyrian listing) β€”
Peak Reflow Temperature 220 Β°C (per Vyrian listing) β€”
Configuration Method JTAG / serial configuration EPROM β€”
Supported I/O Standards LVTTL, LVCMOS, LVDS, PCI β€”
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (legacy product)
Legacy Status Obsolete - consult Altera / Intel FPGA archive for documentation β€”
Logic Elements β€” 25,000 (typical gates)
Macrocells / Embedded Logic β€” 2,432 macros
User I/O Count β€” 492
Propagation Delay (tpd) β€” 1.69 ns
Operating Temperature β€” 0 C to 85 C (commercial)
I/O Standards Supported β€” LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL
LVDS Data Rate β€” 1 Gbps
PLL Count β€” 4
Embedded Memory β€” ESB blocks (dual-port RAM, FIFO, CAM, ROM)
I/O Banks β€” 16

Datasheets & Resources

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