EP2A25F672I6 vs EP2A25F672I-9 Comparison
Detailed side-by-side comparison of EP2A25F672I6 by Intel and EP2A25F672I-9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672I6 | EP2A25F672I-9 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $178.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements (typical gates) | 25,000 | β |
| Fabric Architecture | SRAM-based LUT | β |
| Process Technology | 0.18 Β΅m CMOS | 0.18 Β΅m CMOS |
| Package | 672-ball FineLine BGA (FBGA-672) | 672-pin FCBGA (FineLine BGA) |
| Core Voltage | 1.5 V | 1.5 V / 1.8 V (speed-grade dependent) |
| Configuration Method | External SRAM configuration device (EPC series) | JTAG / serial configuration EPROM |
| Temperature Grade | Industrial (-40 Β°C to +100 Β°C ambient) | β |
| Speed Grade | 6 | -9 |
| Embedded Memory | Embedded System Blocks (ESB), dual-port RAM / CAM | β |
| DSP Blocks | MultiCore dedicated multipliers | β |
| Boundary Scan | JTAG (IEEE 1149.1) compliant | β |
| Clock Management | Dedicated PLL / clock tree circuitry | β |
| I/O Bank Count | [DATA_NEEDED: number of user I/O banks] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Logic Elements (typical) | β | 25,000 |
| Maximum System Gates | β | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESB) Memory | β | 1,125 Kbits |
| Maximum User I/O Pins | β | [DATA_NEEDED: maximum user I/O pins] |
| Number of PLLs | β | 4 |
| Operating Temperature Grade | β | Industrial (-40 Β°C to +100 Β°C junction) |
| Moisture Sensitivity Level (MSL) | β | 3 (per Vyrian listing) |
| Peak Reflow Temperature | β | 220 Β°C (per Vyrian listing) |
| Supported I/O Standards | β | LVTTL, LVCMOS, LVDS, PCI |
| Legacy Status | β | Obsolete - consult Altera / Intel FPGA archive for documentation |