EP2A40F672C6N vs EP2A40F672C7N Comparison
Detailed side-by-side comparison of EP2A40F672C6N by Intel and EP2A40F672C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F672C6N | EP2A40F672C7N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $165.00 | $198.00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 | β |
| Maximum System Gates | 1,125,000 | β |
| Embedded RAM Bits | 442,368 | β |
| Embedded System Blocks (ESBs) | 160 | β |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | β |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V | β |
| Package | 672-ball FineLine BGA | 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch |
| Operating Temperature | Commercial (0C to +85C) | 0 Β°C to 85 Β°C (commercial, 'C' grade) |
| Speed Grade | C6 (per part number suffix) | 7 |
| Configuration Methods | Passive Serial, Passive Parallel, JTAG | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | β |
| Process Technology | SRAM-based, 0.18 um (per family datasheet) | 0.15 Β΅m CMOS, all-layer copper, up to 8 metal layers |
| PLL Count | [DATA_NEEDED: PLL count] | β |
| Logic Elements / Cells | β | 38,400 |
| System Gates | β | 1.5 M |
| Maximum User I/Os | β | 492 |
| Propagation Delay (tpd) | β | 1.55 ns |
| Internal Performance | β | 562 MHz |
| MultiVolt I/O Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Logic Family | β | CMOS |
| Lead-Free / RoHS | β | Yes (N suffix) |
| Configuration Modes | β | Passive Serial, Passive Parallel, JTAG |