EP2A40F672C9 vs EP2A40F672C6N Comparison
Detailed side-by-side comparison of EP2A40F672C9 by Altera and EP2A40F672C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 β Last Time Buy
Specification Comparison
| Parameter | EP2A40F672C9 | EP2A40F672C6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $62.00 | $165.00 |
| Family | APEX II | APEX II |
| Device Family | APEX II PLD | β |
| Logic Elements / Cells | 38,400 | β |
| System Gates | 1.5 M | β |
| Macros | 2,560 | β |
| User I/Os | 492 | β |
| Number of Pins | 672 | β |
| Package | 672-BBGA, FC-FBGA (FineLine) | 672-ball FineLine BGA |
| Package Size | 27 mm Γ 27 mm, 1 mm ball pitch | β |
| Core Voltage | 1.5 V | 1.5 V |
| Process Technology | 0.15 Β΅m all-layer copper, up to 8 metal layers | SRAM-based, 0.18 um (per family datasheet) |
| Logic Family | CMOS | β |
| Propagation Delay | 1.55 ns | β |
| Internal Speed Grade | 366 MHz | β |
| Operating Temperature | 0 Β°C to 85 Β°C (commercial) | Commercial (0C to +85C) |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | β | 40,000 |
| Maximum System Gates | β | 1,125,000 |
| Embedded RAM Bits | β | 442,368 |
| Embedded System Blocks (ESBs) | β | 160 |
| Maximum User I/O Pins | β | [DATA_NEEDED: maximum user I/O count] |
| Speed Grade | β | C6 (per part number suffix) |
| Configuration Methods | β | Passive Serial, Passive Parallel, JTAG |
| PLL Count | β | [DATA_NEEDED: PLL count] |