EP2A70B724I7 vs EP2A70B724I-8 Comparison
Detailed side-by-side comparison of EP2A70B724I7 by Intel and EP2A70B724I-8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 ObsoleteSpecification Comparison
| Parameter | EP2A70B724I7 | EP2A70B724I-8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.50 | $119.00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements | 67200 | β |
| Maximum System Gates | 3 M | β |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | β |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | β |
| Process Technology | 0.15 um CMOS | 0.15 Β΅m CMOS |
| Core Voltage (VCCINT) | 1.5 V | β |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | β |
| PLL Blocks | 4 | β |
| True-LVDS Channels | 8 | β |
| Maximum Internal Frequency | 420 MHz | 281 MHz |
| Package | 724-pin FCBGA (FineLine BGA) | β |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | β |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | β |
| RoHS Status | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | β | 67,200 cells |
| System Gates | β | 3,000,000 |
| Core Supply Voltage | β | 1.5 V |
| I/O Supply Voltage | β | 3.3 V |
| Number of Pins | β | 724 |
| Package Type | β | FCBGA (Flip-Chip Ball Grid Array) |
| Operating Temperature | β | -40 Β°C to +100 Β°C (Industrial) |
| Peak Reflow Temperature | β | 220 Β°C (per JEDEC J-STD-020) |
| User I/O Banks | β | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | β | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | β | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | β | [DATA_NEEDED: EAB count] |
| Embedded RAM | β | [DATA_NEEDED: total bits] |
| PLLs | β | [DATA_NEEDED: PLL count] |
| Configuration Method | β | JTAG / Passive Serial / Passive Parallel |
| Mounting Type | β | Surface Mount |
| MSL Level | β | [DATA_NEEDED: MSL level] |