EP2A70B724I7 vs EP2A70B724I-8 Perbandingan
Perbandingan bersamaan detil EP2A70B724I7 dari Intel dan EP2A70B724I-8 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 Obsolete
Perbandingan Spesifikasi
| Parameter Umum | EP2A70B724I7 | EP2A70B724I-8 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 67200 | — |
| Maximum System Gates | 3 M | — |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | — |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| PLL Blocks | 4 | — |
| True-LVDS Channels | 8 | — |
| Maximum Internal Frequency | 420 MHz | 281 MHz |
| Paket | 724-pin FCBGA (FineLine BGA) | — |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| Status RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | — | 67,200 cells |
| System Gates | — | 3,000,000 |
| Core Supply Voltage | — | 1.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Jumlah Pin | — | 724 |
| Package Type | — | FCBGA (Flip-Chip Ball Grid Array) |
| Suhu Kerja | — | -40 °C to +100 °C (Industrial) |
| Peak Reflow Temperature | — | 220 °C (per JEDEC J-STD-020) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | JTAG / Passive Serial / Passive Parallel |
| Tipe Mounting | — | Surface Mount |
| Level MSL | — | [DATA_NEEDED: MSL level] |