EP2A70B724I7 vs EP2A70B724I-8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A70B724I7 sa pamamagitan ng Intel at EP2A70B724I-8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 ObsoletePagsanggunian na paghahambing
| Parametro | EP2A70B724I7 | EP2A70B724I-8 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 67200 | — |
| Maximum System Gates | 3 M | — |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | — |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| PLL Blocks | 4 | — |
| True-LVDS Channels | 8 | — |
| Maximum Internal Frequency | 420 MHz | 281 MHz |
| Packhaging | 724-pin FCBGA (FineLine BGA) | — |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| Tindminan RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | — | 67,200 cells |
| System Gates | — | 3,000,000 |
| Core Supply Voltage | — | 1.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Bilang ng Pins | — | 724 |
| Package Type | — | FCBGA (Flip-Chip Ball Grid Array) |
| Temperature na Operasyon | — | -40 °C to +100 °C (Industrial) |
| Peak Reflow Temperature | — | 220 °C (per JEDEC J-STD-020) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | JTAG / Passive Serial / Passive Parallel |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |