EP2AGX260FF35I3G vs EP2AGX190FF35I3G Comparison
Detailed side-by-side comparison of EP2AGX260FF35I3G by Intel and EP2AGX190FF35I3G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2AGX260FF35I3G
EP2AGX260FF35I3G - Arria II GX FPGA, 244K LE, 1152-FBGA | Intel
EP2AGX260FF35I3G β Last Time BuyAltera
EP2AGX190FF35I3G
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G β Last Time BuySpecification Comparison
| Parameter | EP2AGX260FF35I3G | EP2AGX190FF35I3G |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,985.00 | $1,840.00 |
| Device Family | Arria II GX | β |
| Logic Elements | 244188 | β |
| Embedded Memory Bits | 12038144 | β |
| Maximum User I/O | 612 | β |
| Package | 1152-BBGA, FCBGA | 1152-ball FC-FBGA (FF35), 35 mm body |
| Process Technology | 40 nm | β |
| Core Supply Voltage | 0.9 V | β |
| Speed Grade | I3 | 3 |
| Operating Temperature | -40 C to +100 C (Industrial) | -40 Β°C to +100 Β°C (industrial, suffix I) |
| Mounting Type | Surface Mount | Surface Mount (flip-chip BGA) |
| Configuration | JTAG / Active Serial / Passive Serial / FPP | β |
| DSP Blocks | [DATA_NEEDED: DSP block count] | β |
| Transceivers | [DATA_NEEDED: number of transceiver channels] | 8 high-speed transceiver channels (multi-gigabit) |
| Lead-Free (RoHS) | Yes (G suffix indicates Pb-free finish) | β |
| Tray Standard Quantity | [DATA_NEEDED: tray qty] | β |
| Family | β | Arria II GX |
| Logic Elements (LE) | β | 181,165 |
| Adaptive Logic Modules (ALM) | β | [DATA_NEEDED: ALM count] |
| User I/O Pins | β | 612 |
| Embedded Memory (bits) | β | 10,177,536 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Embedded Multipliers | β | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | β | [DATA_NEEDED: PLL count] |
| Core Voltage | β | 0.9 V |
| I/O Voltage Standards | β | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | β | 40 nm |
| Ball Pitch | β | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| RoHS Status | β | Compliant (suffix G) |
| Lead-Free | β | Yes |
| Programming Toolchain | β | Quartus II / Quartus Prime |